tm may 2012 fdp12n50 / fdpf12n50t n-channel mosfet ?2012 fairchild semiconductor corporation fdp12n50 / fdpf12n50t rev. c0 www.fairchildsemi.com 1 unifet tm fdp12n50 / fdpf12n50t n-channel mosfet 500v, 11.5a, 0.65 features ?r ds(on) = 0.55 (typ.)@ v gs = 10v, i d = 6a ? low gate charge ( typ. 22nc) ? low c rss ( typ. 11pf) ? fast switching ? 100% avalanche tested ? improved dv/dt capability ? rohs compliant description these n-channel enhancement mode power field effect transistors are produced using fairchild?s proprietary, planar stripe, dmos technology. this advanced technology has be en especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. these devices are well suited for high efficient switched mode power s upplies and active power factor correction. d g s to-220 fdp series g s d to-220f fdpf series g s d mosfet maximum ratings t c = 25 o c unless otherwise noted* thermal characteristics symbol parameter fdp12n50 fdpf12n50t units v dss drain to source voltage 500 v v gss gate to source voltage 30 v i d d r a i n c u r r e n t -continuous (t c = 25 o c) 11.5 11.5 * a -continuous (t c = 100 o c) 6.9 6.9 * i dm d r a i n c u r r e n t - p u l s e d (note 1) 46 46 * a e as single pulsed avalanche energy (note 2) 456 mj i ar avalanche current (note 1) 11.5 a e ar repetitive avalanche energy (note 1) 16.7 mj dv/dt peak diode recovery dv/dt (note 3) 4.5 v/ns p d power dissipation (t c = 25 o c) 165 42 w - derate above 25 o c1.330.3w/ o c t j , t stg operating and storage temperature range -55 to +150 o c t l maximum lead temperature for soldering purpose, 1/8? from case for 5 seconds 300 o c symbol parameter fdp12n50 fdpf12n50t units r jc thermal resistance, junction to case 0.75 3.0 o c/w r cs thermal resistance, case to sink typ. 0.5 - r ja thermal resistance, junction to ambient 62.5 62.5 *drain current limited by maximum junction temperature
fdp12n50 / fdpf12n50t n-channel mosfet fdp12n50 / fdpf12n50t rev. c0 www.fairchildsemi.com 2 package marking and ordering information t c = 25 o c unless otherwise noted electrical characteristics off characteristics on characteristics dynamic characteristics switching characteristics drain-source diod e characteristics device marking device package reel size tape width quantity fdp12n50 fdp12n50 to-220 - - 50 fdpf12n50t fdpf12n50t to-220f - - 50 symbol parameter test conditions min. typ. max. units bv dss drain to source breakdown voltage i d = 250 a, v gs = 0v, t j = 25 o c 500 - - v bv dss / t j breakdown voltage temperature coefficient i d = 250 a, referenced to 25 o c-0.5-v/ o c i dss zero gate voltage drain current v ds = 500v, v gs = 0v - - 1 a v ds = 400v, t c = 125 o c--10 i gss gate to body leakage current v gs = 30v, v ds = 0v - - 100 na v gs(th) gate threshold voltage v gs = v ds , i d = 250 a3.0-5.0v r ds(on) static drain to source on resistance v gs = 10v, i d = 6a - 0.55 0.65 g fs forward transconductance v ds = 40v, i d = 6a (note 4) -11.5- s c iss input capacitance v ds = 25v, v gs = 0v f = 1mhz - 985 1315 pf c oss output capacitance - 140 190 pf c rss reverse transfer capacitance - 11 17 pf q g total gate charge at 10v v ds = 400v, i d = 11.5a v gs = 10v (note 4, 5) -2230nc q gs gate to source gate charge - 6 - nc q gd gate to drain ?miller? charge - 9 - nc t d(on) turn-on delay time v dd = 250v, i d = 11.5a r g = 25 (note 4, 5) -2460ns t r turn-on rise time - 50 110 ns t d(off) turn-off delay time - 45 100 ns t f turn-off fall time - 30 70 ns i s maximum continuous drain to source diode forward current - - 11.5 a i sm maximum pulsed drain to source diode forward current - - 46 a v sd drain to source diode forward voltage v gs = 0v, i sd = 11.5a - - 1.4 v t rr reverse recovery time v gs = 0v, i sd = 11.5a di f /dt = 100a/ s (note 4) - 375 - ns q rr reverse recovery charge - 3.5 - c notes: 1. repetitive rating: pulse width limi ted by maximum junction temperature 2. l = 6.9mh, i as = 11.5a, v dd = 50v, r g = 25 , starting t j = 25 c 3. i sd 11.5a, di/dt 200a/ s, v dd bv dss , starting t j = 25 c 4. pulse test: pulse width 300 s, duty cycle 2% 5. essentially independent of operating temperature typical characteristics
fdp12n50 / fdpf12n50t n-channel mosfet fdp12n50 / fdpf12n50t rev. c0 www.fairchildsemi.com 3 typical performance characteristics figure 1. on-region characteristics figure 2. transfer characteristics figure 3. on-resistance variation vs. figure 4. body diode forward voltage drain current and gate vo ltage variation vs. source current and temperature figure 5. capacitance characteristics figure 6. gate charge characteristics 0.1 1 10 0.1 1 10 20 0.05 *notes: 1. 250 s pulse test 2. t c = 25 o c v gs = 10.0 v 8.0 v 7.0 v 6.5 v 6.0 v 5.5 v i d ,drain current[a] v ds ,drain-source voltage[v] 30 5678 1 10 -55 o c 150 o c *notes: 1. v ds = 20v 2. 250 s pulse test 25 o c i d ,drain current[a] v gs ,gate-source voltage[v] 40 0.0 0.5 1.0 1.5 2.0 1 10 100 *notes: 1. v gs = 0v 2. 250 s pulse test 150 o c i s , reverse drain current [a] v sd , body diode forward voltage [v] 25 o c 0 6 12 18 24 30 0.0 0.5 1.0 1.5 * note : t j = 25 o c v gs = 20v v gs = 10v r ds ( on ) [ ] , drain-source on-resistance i d , drain current [a] 0.1 1 10 0 500 1000 1500 2000 c oss c iss c iss = c gs + c gd ( c ds = shorted ) c oss = c ds + c gd c rss = c gd *note: 1. v gs = 0v 2. f = 1mhz c rss capacitances [pf] v ds , drain-source voltage [v] 30 0 4 8 12162024 0 2 4 6 8 10 *note: i d = 11.5a v ds = 100v v ds = 250v v ds = 400v v gs , gate-source voltage [v] q g , total gate charge [nc]
fdp12n50 / fdpf12n50t n-channel mosfet fdp12n50 / fdpf12n50t rev. c0 www.fairchildsemi.com 4 typical performance characteristics (continued) figure 7. breakdown voltage variation figure 8. on-resistance variation vs. temperature vs. temperature figure 9-1. maximum safe operating area figure 9-2. maximum safe operating area - fdp12n50 - fdpf12n50t figure 10. maximum drain current vs. case temperature -100 -50 0 50 100 150 200 0.8 0.9 1.0 1.1 1.2 *notes: 1. v gs = 0v 2. i d = 250 a bv dss , [normalized] drain-source breakdown voltage t j , junction temperature [ o c ] -100 -50 0 50 100 150 200 0.0 0.5 1.0 1.5 2.0 2.5 3.0 *notes: 1. v gs = 10v 2. i d = 6a r ds(on) , [normalized] drain-source on-resistance t j , junction temperature [ o c ] 110100 0.01 0.1 1 10 100 20 s 100 s 1ms 10ms i d , drain current [a] v ds , drain-source voltage [v] operation in this area is limited by r ds(on) *notes: 1. t c = 25 o c 2. t j = 150 o c 3. single pulse 800 dc 1 10 100 1000 0.01 0.1 1 10 100 20 s 100 s 1ms 10ms i d , drain current [a] v ds , drain-source voltage [v] operation in this area is limited by r ds(on) * notes : 1. t c = 25 o c 2. t j = 150 o c 3. single pulse dc 25 50 75 100 125 150 0 2 4 6 8 10 12 14 i d , drain current [a] t c , case temperature [ o c ]
fdp12n50 / fdpf12n50t n-channel mosfet fdp12n50 / fdpf12n50t rev. c0 www.fairchildsemi.com 5 typical performance characteristics (continued) figure 11-1. transient thermal response curve - fdp12n50 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 1e-3 0.01 0.1 1 0.01 0.1 0.2 0.05 0.02 *notes: 1. z t jc (t) = 0.75 o c/w max. 2. duty factor, d=t 1 /t 2 3. t jm - t c = p dm * z t jc (t) 0.5 single pulse thermal response [ z t jc ] rectangular pulse duration [sec] 3 t 1 p dm t 2 figure 11-2. transient thermal response curve - fdpf12n50t 10 -4 10 -3 10 -2 10 -1 10 0 10 1 10 2 10 3 0.01 0.1 1 0.01 0.1 0.2 0.05 0.02 * notes : 1. z t jc (t) = 3 o c/w max. 2. duty factor, d=t 1 /t 2 3. t jm - t c = p dm * z t jc (t) 0.5 single pulse thermal response [ z t jc ] rectangular pulse duration [sec] 5 t 1 p dm t 2
fdp12n50 / fdpf12n50t n-channel mosfet fdp12n50 / fdpf12n50t rev. c0 www.fairchildsemi.com 6 gate charge test circuit & waveform resistive switching test circuit & waveforms unclamped inductive switching test circuit & waveforms
fdp12n50 / fdpf12n50t n-channel mosfet fdp12n50 / fdpf12n50t rev. c0 www.fairchildsemi.com 7 peak diode recovery dv/dt test circuit & waveforms dut v ds + _ driver r g same type as dut v gs ? dv/dt controlled by r g ?i sd controlled by pulse period v dd l i sd 10v v gs ( driver ) i sd ( dut ) v ds ( dut ) v dd body diode forward voltage drop v sd i fm , body diode forward current body diode reverse current i rm body diode recovery dv/dt di/dt d = gate pulse width gate pulse period -------------------------- dut v ds + _ driver r g same type as dut v gs ? dv/dt controlled by r g ?i sd controlled by pulse period v dd l l i sd 10v v gs ( driver ) i sd ( dut ) v ds ( dut ) v dd body diode forward voltage drop v sd i fm , body diode forward current body diode reverse current i rm body diode recovery dv/dt di/dt d = gate pulse width gate pulse period -------------------------- d = gate pulse width gate pulse period --------------------------
fdp12n50 / fdpf12n50t n-channel mosfet fdp12n50 / fdpf12n50t rev. c0 www.fairchildsemi.com 8
fdp12n50 / fdpf12n50t n-channel mosfet fdp12n50 / fdpf12n50t rev. c0 www.fairchildsemi.com 9 package dimensions dimensions in millimeters to-220f potted * front/back side isolation voltage : ac 2500v
fdp12n50 / fdpf12n50t n-channel mosfet fdp12n50 / fdpf12n50t rev. c0 www.fairchildsemi.com 10 trademarks the following includes registered and unregistered trademarks and se rvice marks, owned by fairchild semiconductor and/or its gl obal subsidiaries, and is not intended to be an exhaustive list of all such trademarks. *trademarks of system general corporation, used under license by fairchild semiconductor. disclaimer fairchild semiconductor reserves the right to make changes wi thout further notice to any products herein to improve reliability, function, or design. fairchild does not assume any li ability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. these specifications do not expand the terms of fairchild?s worldwid e terms and conditions, specifically the warranty therein, which covers these products. life support policy fairchild?s products are not authorized for use as critical components in life support d evices or systems without the express written approval of fairchild semiconductor corporation. as used here in: 1. life support devices or systems ar e devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a sign ificant injury of the user. 2. a critical component in any com ponent of a life su pport, device, or system whose failure to perform can be reasonably ex pected to cause the failure of the life sup port device or system, or to affect its safety or effectiveness. product status definitions definition of terms 2cool? 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